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Freescale 68HC12 : ウィキペディア英語版
Freescale 68HC12

The 68HC12 (6812 or HC12 for short) is a microcontroller family from Freescale Semiconductor. Originally introduced in the mid-1990s, the architecture is an enhancement of the Freescale 68HC11. Programs written for the HC11 are usually compatible with the HC12, which has a few extra instructions. The first 68HC12 derivatives had a maximum bus speed of 8 MHz and flash memory sizes up to 128 KB.
==Architecture of the 68HC12==
Like the 68HC11, the 68HC12 has two 8-bit accumulators A and B (referred to as a single 16-bit accumulator, D, when A & B are cascaded so as to allow for operations involving 16 bits), two 16-bit registers X and Y, a 16-bit program counter, a 16-bit stack pointer and an 8-bit Condition Code Register. Unlike the 68HC11 the processor has 16bit internal data paths
The 68HC12 adds to and replaces a small number of 68HC11 instructions with new forms that are closer to the 6809 processor. More significantly it changes the instruction encodings to be far more dense and adds many 6809 like indexing features, some with even more flexibility. The net result is that code sizes are typically 30% smaller.〔Sibigtroth, James M. (1996) "Transporting M68HC11 Code to M68HC12 Devices", Motorola Semiconductor Application Note AN1284/D, Motorola.〕

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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